PICA200 is a graphics processing unit (GPU) for embedded devices designed by Digital Media Professionals Inc. (DMP), a Japanese GPU design company. It was announced at SIGGRAPH 2005, and presented on SIGGRAPH 2006 conference. PICA is DMP's brand of graphics processors for embedded devices, scalable from portables up to high-performance arcade systems. PICA200 simply denotes a 200 MHz-clocked GPU from PICA family.
PICA200 has an instruction-programmable core (IPC) that gives it capability to change configuration based on demands for specific target system, which will manage with its 3D graphics engine. PICA200 supports second-generation DMPs proprietary MAESTRO graphics technology ('MAESTRO-2G') which includes OpenGL ES 1.1 API support, optional OpenGL ES 1.1 extensions pack and some DMP proprietary extensions which enable custom hardware-based shading algorithms such as procedural texturing,[1] bidirectional reflectance distribution function (BRDF), Cook-Torrance specular highlights, polygon subdivision ('Geo Shader', aka. tessellation),[2] soft shadow projection and per-vertex subsurface scattering (similar to two-sided lighting).[3]
PICA200 위키백과, 우리 모두의 백과사전. PICA200 은 일본의 GPU 설계 기업 디지털 미디어 프로페셔널스 (DMP)사가 설계한 임베디드 장치용 그래픽 처리 장치 (GPU)이다. SIGGRAPH 2005에서 발표되었으며 SIGGRAPH 2006 콘퍼런스에서 시연되었다. PICA200, 133 MHz - GPU 2.4 GHz WPA/WPA2 - IEEE802.11 b/g. CONCLUSION Game Boy Game Boy Advanced Nintendo DS Nintendo 3DS Release Year 1989 2001 2004 2011 Processor Zilog Z80 ARM7 ARM9 ARM11 Speed 4.19 MHz 16.78 MHz 66 MHz - 133MHz. Library for drawing 2D graphics using the Nintendo 3DS's PICA200 GPU. This library contains optimized routines that allow 3DS homebrew developers to develop applications that take full advantage of the GPU to draw 2D graphics. The Japanese company recently announced its Pica200 graphics processor is onboard the 3DS, and it boasts some seriously impressive vital statistics: clocking 15.3 million polygons per second at. Nintendo originally offered a digital video output on early GameCube models. However, it was determined that less than one percent of users utilized the feature. The company eventually removed the option starting with model number DOL-101 of May 2004. The console's technical specifications are as follows.
The 3D processing core of PICA200 consists of up to four programmable vertex pipelines that can be rearranged as four pixel pipelines. The number of IPCs and pipelines will depend on the target processor core and may change in the future.[4]
For 2D graphics rendering there are two optional add-ons:[4] the image post-processing module PICA-FBM ('Frame Buffer Object') that can be used as an anti-aliasing filter with support for some specific 2D functions and the vector graphics module PICA-VG ('Vector Graphics') as PICA-FBM extension.
PICA-FBM is also available as a standalone 2D graphics core. PICA-VG is a PICA-FBM are only available as optional addons.[4]
PICA-VG also supports released Khronos OpenVG 1.0 API, released on July 18, 2005[5] which give it additional potential for vector graphics acceleration.[4]
PICA-FBM is also available as a standalone 2D graphics core. PICA-VG is a PICA-FBM are only available as optional addons.[4]
PICA-VG also supports released Khronos OpenVG 1.0 API, released on July 18, 2005[5] which give it additional potential for vector graphics acceleration.[4]
![Pica200 Pica200](https://i.ytimg.com/vi/KrGvaZrzMhA/maxresdefault.jpg)
PICA200 and MAESTRO-2G is a further refinement of DMP's first-generation MAESTRO developed in DMP's proof-of-concept processor ULTRAY2000.
Applications
DMP announced that Nintendo adopted PICA200 as the GPU for the portable game consoleNintendo 3DS.[6] Snagit 2019.
Specification
- 65 nm Single Core [7](max. clock frequency 400 MHz)
- pixel performance: 800 Mpixel/s[7]
- 400 Mpixel/s @100 MHz[2]
- 1600 Mpixel/s @400 MHz
- vertex performance: 15.3 Mpolygon/s[7]
- 40Mtriangle/s @100 MHz[2]
- 160Mtriangle/s @400 MHz
- pixel performance: 800 Mpixel/s[7]
- Power consumption: 0.5-1.0 mW/MHz[2]
- Frame Buffer max. 4095×4095 pixels
- Supported pixel formats: RGBA 4-4-4-4, RGB 5-6-5, RGBA 5-5-5-1, RGBA 8-8-8-8
- Vertex program (ARB_vertex_program)
- Hardware Transform and Lighting(T&L)
- Full-scene anti-aliasing (2×2)
- Phong Shading
- Cel Shading
- Perspective-Correct Texture Mapping
- Dot3 Bump Mapping/Normal Mapping.
- Shadow Mapping
- Shadow Volumes
- Self-Shadowing
- Lightmapping
- Environment Mapping/Reflection Mapping
- Volumetric Fog[8]
- Post-processing effects like motion, bloom, depth of field, HDR rendering, gamma correction
- Polygon offset
- Depth Test, Stencil Test, Alpha Test.
- Clipping, Culling
- 8-bit stencil buffer
- 24-bit depth buffer
- Single/Double/Triple buffer
- 5-Stage TEV Pipeline
- TEV Combiner Buffer(Only the first four TEV stages can write to the combiner buffer)
- Color Combiners, Alpha Combiners, Texture Combiners.
- PICA-FBM frame buffer management
- DMP's MAESTRO-2G technology:
- per-pixel lighting
- per-vertex sub-surface scattering
- procedural texture
- refraction mapping
- subdivision primitive
- shadow
- gaseous object rendering
- bidirectional reflectance distribution function
- Cook-Torrance Model
- polygon subdivision
- soft shadowing
References
- ↑'Procedural texture generation unit and saving video memory'. August 15, 2006.<templatestyles src='Module:Citation/CS1/styles.css'></templatestyles>
- ↑ 2.02.12.22.3'[Page64] DMP Inc. PICA graphics core'(PDF). EuroGraphics 2008, Crete. April 14–18, 2008.<templatestyles src='Module:Citation/CS1/styles.css'></templatestyles>
- ↑'Soft shadow projection and use of programmable vertex processor'. August 15, 2006.<templatestyles src='Module:Citation/CS1/styles.css'></templatestyles>
- ↑ 4.04.14.24.3'PICA200's OpenGL ES 1.1 support, core programming and optional addon modules'. August 15, 2006.<templatestyles src='Module:Citation/CS1/styles.css'></templatestyles>
- ↑'OpenVG specification'(PDF). July 28, 2005.<templatestyles src='Module:Citation/CS1/styles.css'></templatestyles>
- ↑'Press Release: DMP 3D Graphics IP core 'PICA200' is adopted by Nintendo 3DS'. Digital Media Professionals Inc. (DMP). June 21, 2010.<templatestyles src='Module:Citation/CS1/styles.css'></templatestyles>[html][pdf]
- ↑ 7.07.17.2'PICA 200 3D Graphics IP (product brochure)'(PDF). Digital Media Professionals Inc. (DMP). June 11, 2010.<templatestyles src='Module:Citation/CS1/styles.css'></templatestyles>
- ↑http://www.siliconera.com/2011/03/17/the-nintendo-3ds-knows-how-to-make-fog-its-built-on-a-chip/
External links
Retrieved from 'https://infogalactic.com/w/index.php?title=PICA200&oldid=720296589'
This page lists and describes the hardware found inside the Nintendo 3DS. Many of these parts are custom made and are expanded upon here or in other pages.
- 7Images
- 7.3NAND pinout
Common hardware[edit]
Type | Description |
---|---|
ARM11 Processor Core | Old3DS: ARM11 2x MPCore & 2x VFPv2 Co-Processor 268MHz (268,111,856.0 ± 2-32 Hz, i.e. exactly twice the clock rate of the ARM9). New3DS: 4x MPCore, 4x VFPv2, able to run up to 804MHz (see below). It also has an optional 2MB L2 cache. |
ARM9 Processor Core | ARM946 134MHz (134,055,927.9 ± 2-32 Hz), |
GPU | DMP PICA 268MHz, |
VRAM | 6 MB within SoC. |
Top screen | 800x240, with only 400 usable pixels per eye per line. |
Bottom screen | 320x240, with resistive touch overlay. |
DSP | CEVA TeakLite. 134Mhz. 24ch 32728Hz sampling rates. |
![Pica200 Pica200](https://o.aolcdn.com/images/dims?thumbnail=640%2C480&quality=95&image_uri=https%3A%2F%2Fs.yimg.com%2Fuu%2Fapi%2Fres%2F1.2%2F44IIaFIcfGmlNDgm4TI.jw--~B%2FaD0zMDY7dz01MzA7YXBwaWQ9eXRhY2h5b24-%2Fhttps%3A%2F%2Fwww.blogcdn.com%2Fwww.joystiq.com%2Fmedia%2F2010%2F06%2Fmikage62110.jpg&client=amp-blogside-v2&signature=f67105a7ddd1d6cce83547b17b77fa58abea7784)
New3DS exclusives are able to clock the CPU at 804MHz, but this appears to be limited to the currently running application/app cores. Timed by running svcGetSystemTick on either side of a long idle loop to stay in the current process context. svcGetSystemTick uses a tick counter running at 268MHz in this mode.
On New3DS: when Home Menu is active, the system runs at 804MHz. For everything else, it's 268MHz, except when the app(let) has the required flag set. See here and here for details, regarding clock-rate and cache.
For New3DS-only there are multiple clock-rate multiplier values available in hardware, but since the relevant code is only implemented in the New3DS ARM11-kernel, the only non-normal clock-rate available with official kernel code is 3x.
Specifications[edit]
Type | 3DS | 3DSXL | 2DS | N3DS | N3DSXL | N2DSXL |
---|---|---|---|---|---|---|
Model | CTR-001 | SPR-001 | FTR-001 | KTR-001 | RED-001 | JAN-001 |
SoC | CPU CTR | CPU CTR A CPU CTR | CPU CTR B | CPU LGR A | CPU LGR A | CPU LGR A |
FCRAM | 2x64MB Fujitsu MB82M8080-07L | Fujitsu MB82DBS16641 | Fujitsu MB82DBS1664 | ?? | Fujitsu MB82MK9A9A | Fujitsu MB82MK9A9A |
Top Screen | 3.53 in, 3D | 4.88 in, 3D | 3.53 in cropped from a single panel | 3.88 in, 3D | 4.88 in, 3D | 4.88 in (?) |
Bottom Screen | 3.00 in | 4.18 in | 3.00 in cropped from a single panel | 3.33 in | 4.18 in | 4.18 in (?) |
Storage | Toshiba THGBM2G3P1FBAI8 1GB | Changed between O3DS and N3DS parts depending on production date | Samsung KLM4G1YEQC 4GB (in 1.3GiB SLC mode) or Toshiba THGBMBG4P1KBAIT 2GB (MLC, approx. 1.8GiB usable) | Samsung KLM4G1FEPD 4GB | ||
Speaker, Microphone, Circlepad, Touch controller | TI PAIC3010B 0AA37DW | ?? | ?? | TI AIC3010B 39C4ETW | TI AIC3010D 48C01JW | ?? |
Gyroscope | Invensense ITG-3270 MEMS Gyroscope | ?? | ?? | ?? | ?? | ?? |
Accelerometer | ST Micro 2048 33DH X1MAQ Accelerometer Model LIS331DH | ?? | ?? | ?? | ?? | ?? |
Infrared IC | NXP S750 0803 TSD031C | ?? | ?? | ?? | NXP S750 1603 TSD438C | NXP S750 0210 TSD651C |
Custom Microcontroller | Renesas UC CTR | ?? | Renesas UC CTR 324KM47 KG10 | Renesas UC KTR | Renesas UC KTR 442KM13 TK14 | ?? |
PMIC? | TI 93045A4 OAAH86W | ?? | ?? | TI 93045A4 38A6TYW G2 | TI 93045A4 49AF3NW G2 | TI 93045A4 72ASRHW G2 |
Charging IC | CKP TI BQ24072 | |||||
Wifi | Atheros AR6014 | ?? | ?? | ?? | Atheros AR6014G-AL1C | ?? |
Wifi SPI Flash | Raw ID data: 20 58 | ?? | ?? | Raw ID data: 62 62 | ?? | ?? |
- [11] Official Documentation
- [5],[10] According to iFixit.com (source):
- Datasheet for memory is for a chip in the same series, it has less memory than the one inside the 3DS (128mbits vs 512mbits).
- There is a trove of data on the FCC website at [1].
- [12] This IC is somewhat similar to this.
- The Raw ID data for Wifi SPI Flash is from command 0x9F, RDID.
FCRAM[edit]
There is one FCRAM (Fast Cycle RAM) IC in the 3DS, produced by Fujitsu and branded as MB82M8080-07L. The Fujitsu MB82M8080-07L chip internally contains 2 dies, where each die is branded MB81EDS516545 and MB82DBS08645.
The MB81EDS516545 die is a CMOS Fast Cycle Random Access Memory (FCRAM) with Low Power Double Data Rate (LPDDR) SDRAM Interface containing 512MBit storage accessible in a 64-bit format. The MB81EDS516545 is suited for consumer applications requiring high data bandwidth with low power consumption.
SoC[edit]
The 3DS has much of it's internals housed in a SoC (System on Chip) just like it's predecessors. This is done to reduce build costs, cut down on power consumption, as well as make the PCB layout less complex and make the system harder to tamper with. The SoC, branded as the Nintendo 1048 0H, contains the CPU, GPU, DSP and VRAM.
According to official documents, the CPU used is a dual-core ARM11 CPU, clocked at 268MHz. One core is dedicated to system software, while the other is used for application programming, each known as the syscore and appcore, respectively.
GPU[edit]
Designed by Digital Media Professionals Inc. (DMP) and codenamed PICA200, 268Mhz.
Block diagram of an ULTRAY2000 based architecture PICA200:
PICA200 is compatible with OpenGL ES 1.1. It furthermore provides unique functionality for:
- Per-fragment lighting ('Lighting Maestro')
- Hard- and soft-shadowing ('Shadow Maestro')
- Polygon subdivision ('Figure Maestro')
- Bump mapping and procedural textures ('Mapping Maestro')
- Rendering of gaseous objects ('Particle Maestro')
Some parts of the extended functionality are provided in hardware by an extended geometry pipeline. Most importantly, PICA200 has three programmable vertex processors. There is furthermore a unit called Primitive Engine, which is a geometry shader unit (using the same instruction set as vertex shaders) with support for variable-size primitives. The Primitive Engine functionality may be disabled, and the geometry shader unit then acts as a fourth vertex processor. See Shader_Instruction_Set for more information on the shader instruction set.
Fragment lighting is implemented as an optional pipeline step during pixel processing. It's implemented by having the vertex shader output an additional attribute describing the transformation (represented by a quaternion) to surface-local space. This per-vertex quaternion can then be interpolated across screen space to calculate dot products relevant for lighting (e.g. light vector dot normal vector). To provide support for advanced lighting models, these dot products are used as indices into programmable lookup tables. With this setup, PICA200 in particular supports the shading models Blinn-Phong, Cook-Terrance, Ward, and microfacet-based BRDF-models.
PICA200 supports four texture units, the fourth of which is used exclusively for procedural texture generation.
SDIO controller[edit]
Nintendo recommends SD cards up to 32 GB however the internal SDIO controller seems to support SD cards up to 2.19 Terabyte (32-bit sector number). It's unknown if it really can handle that much. 128 GB was tested and works fine however it causes a major slowdown of the system especially at boot.
Images[edit]
Front[edit]
Back[edit]
NAND pinout[edit]
NAND dumping has been successful, but the image is encrypted.
Normal model[edit]
3ds Hardware
XL model[edit]
2DS[edit]
New 3DS[edit]
Pica.200
New 3DS XL[edit]
WiFi dongle pinout[edit]
SDIO interface is colored red:
- CLK
- CMD
- D0, D1, D2, D3
This is the interface for the 'NEW' WiFi module (based on Atheros AR6002) first included in DSi.
The proprietary DS-mode WiFi is colored yellow, pins are unknown.
I²C eeprom is colored blue:
- SCL
- SDA
SPI Flash is colored purple:
- CLK
- CS#
- SI
- SO
- WP#
- NC
Auxiliary Microcontroller (MCU)[edit]
Monitors HOME button, WiFi switch, 3D slider, volume control slider.Controls LEDs, various power supplies via an I²C connection to the PMIC.
Two I²C buses are attached to the MCU. For one, the SoC is the master; for the other, the MCU is the master.
Devices attached to MCU master I²C bus:
- MCU (master)
- Fuel Gauge
- Accelerometer (slave address 0x18)
- PMIC
- maybe more?
Devices attached to the SoC master I²C bus:
Pica200
- SoC (master)
- MCU
- LCD
- Camera
- QTM (New3DS-only)
The MCU uses the RL78 ISA.
Dmp Pica200
The MCU uses some custom Special Function Registers, but documentation for much of the hardware protocol/general SFRs can be found here.
Retrieved from 'https://www.3dbrew.org/w/index.php?title=Hardware&oldid=21106'